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1. Introduction to the Intel® SoC FPGA Embedded Development Suite (SoC EDS)
2. Installing the Tools
3. Running the Tools
4. SoC EDS Licensing
5. Arm* Development Studio* for Intel® SoC FPGA Edition
6. Boot Tools User Guide
7. Hardware Library
8. Using the HPS Flash Programmer
9. Bare Metal Compilers
10. SD Card Boot Utility
11. Linux* Device Tree Generator
12. Support and Feedback
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6.2. BSP Generator
The BSP Generator is used for the initial configuration of the Bootloader based on the Intel® Quartus® Prime handoff information for the following Intel SoC devices: Cyclone® V SoC, Arria® V SoC and Intel® Arria® 10 SoC.
Note: The BSP Generator is not used for the Intel® Stratix® 10 SoC and Intel® Agilex™ devices. For Intel® Stratix® 10 SoC and Intel® Agilex™ devices, the settings are available in the Intel® Quartus® Prime project, and passed along to the Bootloader by the SDM.
The BSP Generator allows you to create a new BSP with the default settings, based on the handoff information from Intel® Quartus® Prime.
The generated BSP includes a makefile, which outputs a message pointing you to visit "Building Bootloader" on RocketBoards.org to get details on how to build the bootloader.