Intel® SoC FPGA Embedded Development Suite (SoC EDS) User Guide

ID 683187
Date 3/12/2021
Public
Document Table of Contents

1.5.2. Bare Metal and RTOS Developer

As a Bare Metal or a RTOS developer, you need JTAG debugging and low-level visibility into the system. The following tasks require JTAG debugging, which is enabled by the Arm* DS* for Intel® SoC FPGA Edition.

  • To compile your code and the SoC Hardware Library to control the hardware in a convenient and consistent way, use the Bare Metal compiler.
  • To program the flash memory on the target board, use the Flash Programmer.

For more information, see the "Licensing" section.