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1. Introduction to the Intel® SoC FPGA Embedded Development Suite (SoC EDS)
2. Installing the Tools
3. Running the Tools
4. SoC EDS Licensing
5. Arm* Development Studio* for Intel® SoC FPGA Edition
6. Boot Tools User Guide
7. Hardware Library
8. Using the HPS Flash Programmer
9. Bare Metal Compilers
10. SD Card Boot Utility
11. Linux* Device Tree Generator
12. Support and Feedback
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1.5.2. Bare Metal and RTOS Developer
As a Bare Metal or a RTOS developer, you need JTAG debugging and low-level visibility into the system. The following tasks require JTAG debugging, which is enabled by the Arm* DS* for Intel® SoC FPGA Edition.
- To compile your code and the SoC Hardware Library to control the hardware in a convenient and consistent way, use the Bare Metal compiler.
- To program the flash memory on the target board, use the Flash Programmer.
For more information, see the "Licensing" section.
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