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1. Introduction to the Intel® SoC FPGA Embedded Development Suite (SoC EDS)
2. Installing the Tools
3. Running the Tools
4. SoC EDS Licensing
5. Arm* Development Studio* for Intel® SoC FPGA Edition
6. Boot Tools User Guide
7. Hardware Library
8. Using the HPS Flash Programmer
9. Bare Metal Compilers
10. SD Card Boot Utility
11. Linux* Device Tree Generator
12. Support and Feedback
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6.2.4. BSP Files and Folders
The files and folders created with the BSP Generator are stored in the location you specified in BSP target directory in the New BSP dialog box.
For Cyclone® V SoC/Arria Preloader BSPs, the generated files include the following:
- settings.bsp – file containing all BSP settings
- Makefile – makefile used to compile the Preloader and create the preloader image; for more information, refer to Preloader Compilation
- preloader.ds – deprecated, and not used
- generated – folder containing files generated from the hardware handoff files
For Intel® Arria® 10 SoC Bootloader BSPs the generated files include the following:
- settings.bsp – file containing all BSP settings
- Makefile – makefile used to compile the Bootloader, convert the Bootloader device tree file to binary, and create the combined Bootloader and Bootloader Device Tree image; for more information, refer to Preloader Compilation
- config.mk – deprecated, and not used
- devicetree.dts – Bootloader device tree, containing the Bootloader customization details, derived from the handoff files and you settings