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1. Overview
2. Getting Started
3. Powering Up the Development Kit
4. Board Test System
5. Development Kits Hardware and Configuration
6. Custom Projects for the Development Kit
7. Document Revision History for the Intel Agilex® 7 FPGA F-Series Development Kit User Guide
A. Development Kit Components
B. Additional Information
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1.1. Block Diagram
Figure 1. Intel Agilex® 7 FPGA F-Series Development Kit Block Diagram
Feature Summary
- Intel Agilex® 7 FPGA F-Series, 1400 KLE, 2486- (R24A and R24B) packages
- 2x Standard QSFPDD supports both optical and electrical cable interfaces connected to E-Tile transceivers
- PCIe x16 Gen 4 golden finger connected to P-Tile transceivers, supports x1/x4/x8/x16 modes
- 3x 288-Pin DDR4 DIMMs sockets to support 72 bits DDR4/DDR-T module in FPGA Fabric interface
- 1x 288-Pin DDR4 DIMM socket to support 72 bits DDR4 module for HPS memory interface
- 2 Gb QSPI Flash for active serial FPGA configuration (ASx4 mode)
- Programmable clock resource for XCVR, memory and FPGA fabric
- HPS interface supporting: ETH, UART, SD card socket, eMMC and Mictor connector
Note: Golden Software Reference Design for HPS (GSRD) is not currently available for this development kit.