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1. Overview
2. Getting Started
3. Powering Up the Development Kit
4. Board Test System
5. Development Kits Hardware and Configuration
6. Custom Projects for the Development Kit
7. Document Revision History for the Intel Agilex® 7 FPGA F-Series Development Kit User Guide
A. Development Kit Components
B. Additional Information
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6.1. Add SmartVID settings in the QSF file
Intel Agilex® 7 FPGA assembled on this development kit enables SmartVID feature by default.
You must put the constraints listed below into your project QSF file to avoid Intel® Quartus® Prime from generating an error due to incomplete SmartVID settings.
Open your project QSF file and copy and paste constraint scripts listed below into the file. You must ensure that there are no other similar settings with different values.
set_global_assignment -name PWRMGT_SLAVE_DEVICE0_ADDRESS 47 set_global_assignment -name PWRMGT_SLAVE_DEVICE1_ADDRESS 00 set_global_assignment -name PWRMGT_SLAVE_DEVICE2_ADDRESS 00 set_global_assignment -name ACTIVE_SERIAL_CLOCK AS_FREQ_100MHZ set_global_assignment -name USE_PWRMGT_SCL SDM_IO14 set_global_assignment -name USE_PWRMGT_SDA SDM_IO11 set_global_assignment -name USE_CONF_DONE SDM_IO16
For Intel Agilex® 7 FPGA F-Series Development Kit (-3V version)
set_global_assignment -name PWRMGT_BUS_SPEED_MODE "100 KHZ" set_global_assignment -name PWRMGT_SLAVE_DEVICE_TYPE OTHER set_global_assignment -name PWRMGT_VOLTAGE_OUTPUT_FORMAT "LINEAR FORMAT" set_global_assignment -name PWRMGT_LINEAR_FORMAT_N "-12" set_global_assignment -name PWRMGT_TRANSLATED_VOLTAGE_VALUE_UNIT VOLTS set_global_assignment -name PWRMGT_PAGE_COMMAND_ENABLE ON
For Intel Agilex® 7 FPGA F-Series Development Kit (-2V version)
set_global_assignment -name PWRMGT_SLAVE_DEVICE_TYPE ED8401 set_global_assignment -name PWRMGT_VOLTAGE_OUTPUT_FORMAT "LINEAR FORMAT" set_global_assignment -name PWRMGT_LINEAR_FORMAT_N "-13" set_global_assignment -name PWRMGT_PAGE_COMMAND_ENABLE OFF