Visible to Intel only — GUID: GUID-F824F476-280F-4B35-AA13-1742288D760D
Visible to Intel only — GUID: GUID-F824F476-280F-4B35-AA13-1742288D760D
Defining a Kernel for FPGAs
In SYCL*, a queue connects a host program to a single device. Host programs submit tasks to a device via the queue and can monitor the queue for task completion.
Your kernel (that is, the code that you want to run on the FPGA device) is defined within the command that submits the task for processing. For single work-item kernels, the command is queue-name.singletask. The format changes slightly depending on the coding style you use:
- Lambda coding style:
queue-name.single_task<kernel_name>([=]() { // Kernel code goes here })
- Functor coding style:
queue-name.single_task<kernel_name>(Kernel functor object goes here)
In the SYCL HLS flow, your kernel code is compiled to an RTL IP core and your host program is the testbench for the IP core.
For more information about SYCL queues and kernels and programming in DPC++, refer to the following publications:
- SYCL* 2020 Specification by the Khronos* Group. (https://registry.khronos.org/SYCL/specs/sycl-2020/html/sycl-2020.html)
The SYCL* specification provides detailed descriptions of SYCL concepts and application programming interfaces (APIs).
- Data Parallel C++: Programming Accelerated Systems Using C++ and SYCL* (https://link.springer.com/book/10.1007/978-1-4842-9691-2)
This free book teaches you how to accelerate C++ programs using data parallel programming that targets various device types, including FPGA devices.