Intel® C++ Compiler Classic Developer Guide and Reference

ID 767249
Date 7/13/2023
Public
Document Table of Contents

_tile_storeconfig

Synopsis

void _tile_storeconfig (void * mem_addr)
Type Value
Type Tile
Header file #include <immintrin.h>
Instruction STTILECFG m512
CPUID flags AMXTILE

Description

Stores the current tile configuration to a 64-byte memory location specified by "mem_addr". The tile configuration format is specified below, and includes the tile type pallette, the number of bytes per row, and the number of rows. If tiles are not configured, all zeroes will be stored to memory.

Technology

AMX

Category

Application-Targeted

Operation

//	format of memory payload. each field is a byte.
//		 0: palette_id
//		 1: startRow (8b)
//	 2-15: reserved (must be zero)
//	16-17: tile0.colsb -- bytes_per_row
//	18-19: tile1.colsb
//	20-21: tile2.colsb
//			...
//	46-47: tile15.colsb
//		48: tile0.rows
//		49: tile1.rows
//		50: tile2.rows
//			 ...
//		63: tile15.rows