Visible to Intel only — GUID: GUID-BD5FCF29-A63F-4688-85B3-E0AA8C3873B1
Visible to Intel only — GUID: GUID-BD5FCF29-A63F-4688-85B3-E0AA8C3873B1
Conversion Intrinsics
Intel® Streaming SIMD Extensions 2 (Intel® SSE2) intrinsics for integer conversion operations are listed in this topic. The prototypes for Intel® SSE2 intrinsics are in the emmintrin.h header file.
To use these intrinsics, include the immintrin.h file as follows:
#include <immintrin.h>
The results of each intrinsic operation are placed in registers. The information about what is placed in each register appears in the tables below, in the detailed explanation of each intrinsic. R, R0, R1, R2, and R3 represent the registers in which results are placed.
Intrinsics marked with * are implemented only on Intel® 64 architecture. The rest of the intrinsics are implemented on both IA-32 and Intel® 64 architectures.
Intrinsic Name |
Operation |
Corresponding Intel® SSE2 Instruction |
---|---|---|
_mm_cvtsi64_sd* |
Convert and pass through |
CVTSI2SD |
_mm_cvtsd_si64* |
Convert according to rounding |
CVTSD2SI |
_mm_cvttsd_si64* |
Convert using truncation |
CVTTSD2SI |
_mm_cvtepi32_ps |
Convert to SP FP |
None |
_mm_cvtps_epi32 |
Convert from SP FP |
None |
_mm_cvttps_epi32 |
Convert from SP FP using truncate |
None |
_mm_cvtsi64_sd
__m128d _mm_cvtsi64_sd(__m128d a, __int64 b);
Converts the signed 64-bit integer value in b to a DP FP value. The upper DP FP value in a is passed through.
Use only on Intel® 64 architectures.
R0 |
R1 |
---|---|
(double)b |
a1 |
_mm_cvtsd_si64
__int64 _mm_cvtsd_si64(__m128d a);
Converts the lower DP FP value of a to a 64-bit signed integer value according to the current rounding mode.
Use only on Intel® 64 architectures.
R |
---|
(__int64) a0 |
_mm_cvttsd_si64
__int64 _mm_cvttsd_si64(__m128d a);
Converts the lower DP FP value of a to a 64-bit signed integer value using truncation.
Use only on Intel® 64 architectures.
R |
---|
(__int64) a0 |
_mm_cvtepi32_ps
__m128 _mm_cvtepi32_ps(__m128i a);
Converts the four signed 32-bit integer values of a to SP FP values.
R0 |
R1 |
R2 |
R3 |
---|---|---|---|
(float) a0 |
(float) a1 |
(float) a2 |
(float) a3 |
_mm_cvtps_epi32
__m128i _mm_cvtps_epi32(__m128 a);
Converts the four SP FP values of a to signed 32-bit integer values.
R0 |
R1 |
R2 |
R3 |
---|---|---|---|
(int) a0 |
(int) a1 |
(int) a2 |
(int) a3 |
_mm_cvttps_epi32
__m128i _mm_cvttps_epi32(__m128 a);
Converts the four SP FP values of a to signed 32 bit integer values using truncate.
R0 |
R1 |
R2 |
R3 |
---|---|---|---|
(int) a0 |
(int) a1 |
(int) a2 |
(int) a3 |