I2C_emac Address Map

DW_apb_i2c address block

Module Instance	Base Address	End Address
`i_i2c_emac_0_DW_apb_i2c_addr_block1`	`0xFFC02A00`	`0xFFC02AFF`
`i_i2c_emac_1_DW_apb_i2c_addr_block1`	`0xFFC02B00`	`0xFFC02BFF`
`i_i2c_emac_2_DW_apb_i2c_addr_block1`	`0xFFC02C00`	`0xFFC02CFF`

Register	Offset	Width	Access	Reset Value	Description
`IC_CON`	`0x0`	`32`	`RW`	`0x0000007D`	I2C Control Register
`IC_TAR`	`0x4`	`32`	`RW`	`0x00001055`	I2C Target Address Register
`IC_SAR`	`0x8`	`32`	`RW`	`0x00000055`	I2C Slave Address Register
`IC_DATA_CMD`	`0x10`	`32`	`RW`	`0x00000000`	I2C Rx/Tx Data Buffer and Command Register
`IC_SS_SCL_HCNT`	`0x14`	`32`	`RW`	`0x000001F4`	Standard Speed I2C Clock SCL High Count Register
`IC_SS_SCL_LCNT`	`0x18`	`32`	`RW`	`0x0000024C`	Standard Speed I2C Clock SCL Low Count Register
`IC_FS_SCL_HCNT`	`0x1C`	`32`	`RW`	`0x0000004B`	Fast Mode or Fast Mode Plus I2C Clock SCL High Count Register
`IC_FS_SCL_LCNT`	`0x20`	`32`	`RW`	`0x000000A3`	Fast Mode or Fast Mode Plus I2C Clock SCL Low Count Register
`IC_INTR_STAT`	`0x2C`	`32`	`RO`	`0x00000000`	High Speed I2C Clock SCL Low Count Register
`IC_INTR_MASK`	`0x30`	`32`	`RW`	`0x000008FF`	I2C Interrupt Mask Register
`IC_RAW_INTR_STAT`	`0x34`	`32`	`RO`	`0x00000000`	I2C Raw Interrupt Status Register
`IC_RX_TL`	`0x38`	`32`	`RW`	`0x00000000`	I2C Receive FIFO Threshold Register
`IC_TX_TL`	`0x3C`	`32`	`RW`	`0x00000000`	I2C Transmit FIFO Threshold Register
`IC_CLR_INTR`	`0x40`	`32`	`RO`	`0x00000000`	Clear Combined and Individual Interrupt Register
`IC_CLR_RX_UNDER`	`0x44`	`32`	`RO`	`0x00000000`	Clear RX_UNDER Interrupt Register
`IC_CLR_RX_OVER`	`0x48`	`32`	`RO`	`0x00000000`	Clear RX_OVER Interrupt Register
`IC_CLR_TX_OVER`	`0x4C`	`32`	`RO`	`0x00000000`	Clear TX_OVER Interrupt Register
`IC_CLR_RD_REQ`	`0x50`	`32`	`RO`	`0x00000000`	Clear RD_REQ Interrupt Register
`IC_CLR_TX_ABRT`	`0x54`	`32`	`RO`	`0x00000000`	Clear TX_ABRT Interrupt Register
`IC_CLR_RX_DONE`	`0x58`	`32`	`RO`	`0x00000000`	Clear RX_DONE Interrupt Register
`IC_CLR_ACTIVITY`	`0x5C`	`32`	`RO`	`0x00000000`	Clear ACTIVITY Interrupt Register
`IC_CLR_STOP_DET`	`0x60`	`32`	`RO`	`0x00000000`	Clear STOP_DET Interrupt Register
`IC_CLR_START_DET`	`0x64`	`32`	`RO`	`0x00000000`	Clear START_DET Interrupt Register
`IC_CLR_GEN_CALL`	`0x68`	`32`	`RO`	`0x00000000`	Clear GEN_CALL Interrupt Register
`IC_ENABLE`	`0x6C`	`32`	`RW`	`0x00000000`	I2C ENABLE Register
`IC_STATUS`	`0x70`	`32`	`RO`	`0x00000006`	I2C STATUS Register
`IC_TXFLR`	`0x74`	`32`	`RO`	`0x00000000`	I2C Transmit FIFO Level Register
`IC_RXFLR`	`0x78`	`32`	`RO`	`0x00000000`	I2C Receive FIFO Level Register
`IC_SDA_HOLD`	`0x7C`	`32`	`RW`	`0x00000001`	I2C SDA Hold Time Length Register
`IC_TX_ABRT_SOURCE`	`0x80`	`32`	`RO`	`0x00000000`	I2C Transmit Abort Source Register
`IC_SLV_DATA_NACK_ONLY`	`0x84`	`32`	`RW`	`0x00000000`	Generate Slave Data NACK Register
`IC_DMA_CR`	`0x88`	`32`	`RW`	`0x00000000`	DMA Control Register
`IC_DMA_TDLR`	`0x8C`	`32`	`RW`	`0x00000000`	DMA Transmit Data Level Register
`IC_DMA_RDLR`	`0x90`	`32`	`RW`	`0x00000000`	DMA Transmit Data Level Register
`IC_SDA_SETUP`	`0x94`	`32`	`RW`	`0x00000064`	I2C SDA Setup Register
`IC_ACK_GENERAL_CALL`	`0x98`	`32`	`RW`	`0x00000001`	I2C ACK General Call Register
`IC_ENABLE_STATUS`	`0x9C`	`32`	`RO`	`0x00000000`	I2C Enable Status Register
`IC_FS_SPKLEN`	`0xA0`	`32`	`RW`	`0x00000002`	I2C SS, FS or FM+ spike suppression limit
`IC_CLR_RESTART_DET`	`0xA8`	`32`	`RO`	`0x00000000`	Clear RESTART_DET Interrupt Register
`IC_COMP_PARAM_1`	`0xF4`	`32`	`RO`	`0x003F3FEA`	Component Parameter Register 1
`IC_COMP_VERSION`	`0xF8`	`32`	`RO`	`0x3230302A`	I2C Component Version Register
`IC_COMP_TYPE`	`0xFC`	`32`	`RO`	`0x44570140`	I2C Component Type Register