IC_SAR
Name: I2C Slave Address Register
Size: 10 bits
Address Offset: 0x08
Read/Write Access: Read/Write
Module Instance | Base Address | Register Address |
---|---|---|
i_i2c_emac_0_DW_apb_i2c_addr_block1 | 0xFFC02A00 | 0xFFC02A08 |
i_i2c_emac_1_DW_apb_i2c_addr_block1 | 0xFFC02B00 | 0xFFC02B08 |
i_i2c_emac_2_DW_apb_i2c_addr_block1 | 0xFFC02C00 | 0xFFC02C08 |
Size: 32
Offset: 0x8
Access: RW
Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
Bit Fields | |||||||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
RSVD_IC_SAR RO 0x0 |
|||||||||||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RSVD_IC_SAR RO 0x0 |
IC_SAR RW 0x55 |
IC_SAR Fields
Bit | Name | Description | Access | Reset |
---|---|---|---|---|
31:10 | RSVD_IC_SAR |
Reserved bits - Read Only |
RO | 0x0 |
9:0 | IC_SAR |
The IC_SAR holds the slave address when the I2C is operating as a slave. For 7-bit addressing, only IC_SAR[6:0] is used. This register can be written only when the I2C interface is disabled, which corresponds to the IC_ENABLE[0] register being set to 0. Writes at other times have no effect. Note The default values cannot be any of the reserved address locations: that is, 0x00 to 0x07, or 0x78 to 0x7f. The correct operation of the device is not guaranteed if you program the IC_SAR or IC_TAR to a reserved value. Reset value: IC_DEFAULT_SLAVE_ADDR configuration parameter |
RW | 0x55 |