IC_ACK_GENERAL_CALL
Name: I2C ACK General Call Register
Size: 1 bit
Address Offset: 0x98
Read/Write Access: Read/Write
The register controls whether DW_apb_i2c responds
with a ACK or NACK when it receives an I2C
General Call address.
Note :This register is applicable only when the DW_apb_i2c is in slave mode
Dependencies: This register is not applicable when IC_ULTRA_FAST_MODE=1
| Module Instance | Base Address | Register Address |
|---|---|---|
| i_i2c_emac_0_DW_apb_i2c_addr_block1 | 0xFFC02A00 | 0xFFC02A98 |
| i_i2c_emac_1_DW_apb_i2c_addr_block1 | 0xFFC02B00 | 0xFFC02B98 |
| i_i2c_emac_2_DW_apb_i2c_addr_block1 | 0xFFC02C00 | 0xFFC02C98 |
Size: 32
Offset: 0x98
Access: RW
Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
| Bit Fields | |||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
|
RSVD_IC_ACK_GEN_1_31 RO 0x0 |
|||||||||||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|
RSVD_IC_ACK_GEN_1_31 RO 0x0 |
ACK_GEN_CALL RW 0x1 |
||||||||||||||
IC_ACK_GENERAL_CALL Fields
| Bit | Name | Description | Access | Reset | ||||||
|---|---|---|---|---|---|---|---|---|---|---|
| 31:1 | RSVD_IC_ACK_GEN_1_31 |
Reserved bits [31:1] - Read Only |
RO | 0x0 | ||||||
| 0 | ACK_GEN_CALL |
ACK General Call. When set to 1, DW_apb_i2c responds with a ACK (by asserting ic_data_oe) when it receives a General Call. Otherwise, DW_apb_i2c responds with a NACK (by negating ic_data_oe). Default Reset value: 0x1, but can be hardcoded by setting the IC_DEFAULT_ACK_GENERAL_CALL configuration parameter.
|
RW | 0x1 |