Variable Precision DSP Blocks User Guide: Agilex™ 5 FPGAs and SoCs
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6.2.1.3. Pre-adder Input Mode
In this mode, one multiplier operand derives from the pre-adder, and the other operand derives from the datac[] input port.
This mode is expressed in the following equation.

The following shows the pre-adder input mode of a multiplier.