Ethernet Subsystem Intel® FPGA IP User Guide: Early Access Customer Release

ID 773413
Date 4/14/2023
Public

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Document Table of Contents

8.1.11. HSSI Control/Address

Description: HSSI Control 1

Byte Offset: 0xAC

Addressing Mode: 32 bits

Bit Type Reset Description
31:16 RW 0

When SAL command = get_csr, set_csr,

Address bit [23:8]

When SAL command = read_MAC_statistic,

[20:16] - Counters

[30:21] - Reserved

[31:31] - LSB

When SAL command = reset_MAC_statistic,

[16:16] - TX

[17:17] - RX

[31:18] - Reserved

15:12

Port/Address:

When SAL command = get_hssi_profile, set_hssi_profile, enable loopback, disable loopback, read_MAC_statistic, reset MAC statistic, get_mtu, set_mtu, get link status

[15:12] = Port[7:4]

When SAL command = get_csr, set_csr

[15:12] = Address[7:4]

Others

[15:12] = 4'b0

11:8 RW 0

Port/Address:

When SAL command = get_hssi_profile, set_hssi_profile, enable loopback, disable loopback, read_MAC_statistic, reset MAC statistic, get_mtu, set_mtu, ncsi get link status

[11:8] = Port[3:0]

When SAL command = get_csr, set_csr

[11:8] = Address[3:0]

Others

[11:8] = 4'b0

7:0 RW 0

SAL Command:

0x0 NOP

0x1 get_hssi_profile

0x2 set_hssi_profile

0x3 read_MAC_statistic

0x4 get_mtu

0x5 Set CSR

0x6 Get CSR

0x7 Enable loopback

0x8 Disable loopback

0x9 - reset MAC statistic

0xA set_mtu

0xB - Ncsi get link status

0xC - 0xFE reserved

0xFF firmware_version