Nios® V Embedded Processor Design Handbook

ID 726952
Date 7/08/2024
Public
Document Table of Contents

2.1. Creating Nios® V Processor System Design with Platform Designer

The Quartus® Prime software includes the Platform Designer system integration tool that simplifies the task of defining and integrating Nios® V processor IP core and other IPs into an Intel FPGA system design. The Platform Designer automatically creates interconnect logic from the specified high-level connectivity. The interconnect automation eliminates the time-consuming task of specifying system-level HDL connections.

After analyzing the system hardware requirements, you use Quartus® Prime to specify the Nios® V processor core, memory, and other components your system requires. The Platform Designer automatically generates the interconnect logic to integrate the components in the hardware system.