Agilex™ 7 FPGA I-Series Transceiver-SoC Development Kit User Guide

ID 721605
Date 5/31/2024
Public
Document Table of Contents

3.3.1. Restore Board System MAX® 10 with Default Factory Image

  1. Open Quartus® Prime Programmer GUI, and detect the JTAG chain after System MAX® 10 is restored.
  2. Attach System MAX® 10 image on System MAX® 10 part.
  3. Select programming options and click program button.
    Note: Once you plug Intel® FPGA Download Cable between J11 and PC, the Intel® on-board download cable circuit is disabled automatically.