F-Tile Low Latency Ethernet 10G MAC Intel® FPGA IP Design Example User Guide

ID 720987
Date 11/29/2023
Public

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2.4.1. Procedure

You can compile and test the design in the supported Intel FPGA development kit.
  1. Launch the Intel® Quartus® Prime Pro Edition software and open the design example project file. Select Processing > Start Compilation to compile the design example.
    The timing constraints for the design example and the design components are automatically loaded during compilation.
  2. Connect the development board to the host computer.
    Note: For the frequencies to set, refer to the Hardware Testing section in the respective design example chapter.
  3. In the Intel® Quartus® Prime Pro Edition software, select Tools > Programmer to configure the FPGA on the development board using the generated .sof file.
  4. In the Intel® Quartus® Prime software, select Tools > System Debugging Tools > System Console to launch the system console.
  5. Change the working directory to <Example Design>\hwtesting\system_console_fm.
  6. Initialize the design command list by running this command: source main.tcl.
You can now run any of the predefined hardware tests from the System Console.
Observe the test results displayed.