F-Tile Low Latency Ethernet 10G MAC Intel® FPGA IP Design Example User Guide

ID 720987
Date 11/29/2023
Public

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3.6. Interface Signals

Figure 15. Interface Signals of the 10M/100M/1G/2.5G/5G/10G (USXGMII) Ethernet Design Example without the IEEE 1588v2 Feature
Figure 16. Interface Signals of the 10M/100M/1G/2.5G/5G/10G (USXGMII) Ethernet Design Example with the IEEE 1588v2 Feature