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1. About the F-Tile Low Latency Ethernet 10G MAC Intel® FPGA IP Design Example User Guide
2. Quick Start Guide
3. 10M/100M/1G/2.5G/5G/10G (USXGMII) Ethernet Design Example
4. Interface Signals Description
5. Configuration Registers Description
6. F-Tile Low Latency Ethernet 10G MAC Intel FPGA IP Design Example User Guide Archives
7. Document Revision History for the F-Tile Low Latency Ethernet 10G MAC Intel® FPGA IP Design Example User Guide
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3.1. Features
- Supports dual Ethernet channel operating at 10M, 100M, 1G, 2.5G, 5G, and 10G.
- On the transmit and receive paths:
- Provides packet monitoring system.
- Reports Ethernet MAC statistics counter.
- Reports packet timestamps for design examples with IEEE 1588v2 feature enabled.
- Supports testing using different types of Ethernet packet transfer protocol.