PCB Stackup Design Considerations for Intel® FPGAs

ID 683883
Date 6/28/2017
Public
Document Table of Contents

1.7.1.1. Stratix® 10 Device Family Power Plane Placement Example

Top of PCB
  • Sensitive Transceiver Power—VCCT_GXB, VCCR_GXB
  • Analog and Digital PLL Power—VCCA_PLL, VCCPLLDIG_SDM, VCCPLLDIG_HPS, VCCPLL_SDM, VCCPLL_HPS
  • Other Transceiver Power—VCCH_GXB
  • I/O and Other Power—VCCIO, VCCIO3V, VCCIO_SDM, VCCIO_HPS
  • Core Power—VCC, VCCP, VCCL_HPS
Bottom of PCB