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1. CvP Initialization in Intel® Arria® 10
2. Design Considerations for CvP Initialization in Intel® Arria® 10
3. Understanding the Design Steps for CvP Initialization in Intel® Arria® 10
4. CvP Driver and Registers
5. Partial Reconfiguration over PCI Express in Intel® Arria® 10
6. Understanding Design Steps for PR over PCI Express in Intel® Arria® 10
7. Document Revision History for the Intel® Arria® 10 CvP Initialization and Partial Reconfiguration over PCI Express* User Guide
4.3.1. Altera-defined Vendor Specific Capability Header Register
4.3.2. Altera-defined Vendor Specific Header Register
4.3.3. Altera Marker Register
4.3.4. CvP Status Register
4.3.5. CvP Mode Control Register
4.3.6. CvP Data Registers
4.3.7. CvP Programming Control Register
4.3.8. Uncorrectable Internal Error Status Register
4.3.9. Uncorrectable Internal Error Mask Register
4.3.10. Correctable Internal Error Status Register
4.3.11. Correctable Internal Error Mask Register
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3.4. Splitting the SOF File
Follow these steps to split your .SOF file into separate images for the periphery and core logic.
- After the .SOF file is generated, under File menu, select Convert Programming File.
- Under Output programming file section, specify the following parameters:
Parameter Value Programming file type JTAG Indirect Configuration File (*.jic) Configuration device EPCQL1024 Mode Active Serial File name *.jic Create Memory Map File Turn this option on. Create CvP files Turn this option on. This box is greyed out until you specify the SOF Data file under Input files to convert. Note: You can select Programmer Object File (*.pof)and your respective configuration device if you are using Passive Serial or Fast Passive Serial mode. - Under Input files to convert, specify the following parameters:
Parameter Value Flash Loader 10AX115S1F45I1SG SOF Data *.sof - Make sure to turn on the Create CvP files.
Note: If you do not check this box, the Quartus Prime software does not create separate files for the periphery and core images.Figure 7. Illustrating the above specified options in the Convert Programming File GUI
- Click Generate to create *.periph.jic and *.core.rbf files. Alternatively, you can use the following command to generate CvP periphery image (*.jam) file for the JTAG configuration:
quartus_cpf -c <filename>.sof <filename>.jam --cvp