AN 696: Using the JESD204B MegaCore Function in Arria V Devices

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ID 683843
Date 5/11/2015
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Document Table of Contents
Document Table of Contents x
1. AN 696: Using the JESD204B MegaCore Function in Arria V Devices
1. AN 696: Using the JESD204B MegaCore Function in Arria V Devices x
1.1. JESD204B MegaCore Function Reference Design 1.2. Hardware and Software Requirements 1.3. Hardware Setup 1.4. Using the Reference Design 1.5. Using the System Console Tool to Execute Commands 1.6. JESD204B MegaCore Function Link initialization Sequences 1.7. Editing and Recompiling the Reference Design 1.8. Document Revision History
1.1. JESD204B MegaCore Function Reference Design x
1.1.1. SYSREF Generator 1.1.2. In-System Sources and Probes (ISSP) 1.1.3. Qsys System 1.1.4. File Directory and Content 1.1.5. Reference Design Initialization Sequence
1.3. Hardware Setup x
1.3.1. FPGA Pin Assignments 1.3.2. Status LED
1. AN 696: Using the JESD204B MegaCore Function in Arria V Devices

1.3.2. Status LED

The table below lists the status LEDs on the Arria V GT FPGA Development Kit and its function.
Note: If you utilize the Signal Tap II Logic Analyzer tool to pole the status of these signals, use the rxframe_clk signal as the sampling clock.
Table 7.  Status LEDs
LED Board Reference Signal Name Description
D26 data_error [1:0] Single AND-ed error status signal for the PRBS checkers from both lane 0 & lane 1. The LED illuminates to indicate a data error.
D27 jesd204_tx_int Link layer TX interrupt signal. Applicable only when internal serial loopback is enabled. The LED illuminates to indicate a TX interrupt.
D28 jesd204_rx_int Link layer RX interrupt signal. The LED illuminates to indicate a RX interrupt.
D29 rx_dev_sync_n SYNC~ signal to the transmitter. The LED illuminates to indicate that the transmitter has received K28.5 characters.
D30 dev_lane_aligned RX path lane alignment status signal for the device. The LED illuminates to indicate that lane alignment is achieved.
D31 avs_rst_n Link layer CSR Avalon-MM reset signal. The LED illuminates to indicate that the Avalon-MM interface is out of reset.
D32 link_rst_n Link layer reset signal. The LED illuminates to indicate that the link layer is out of reset.
D33 frame_rst_n Transport layer reset signal. The LED illuminates to indicate that the transport layer is out of reset.
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