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Key Advantages of Cyclone® V Devices
Summary of Cyclone® V Features
Cyclone® V Device Variants and Packages
I/O Vertical Migration for Cyclone® V Devices
Adaptive Logic Module
Variable-Precision DSP Block
Embedded Memory Blocks
Clock Networks and PLL Clock Sources
FPGA General Purpose I/O
PCIe* Gen1 and Gen2 Hard IP
External Memory Interface
Low-Power Serial Transceivers
SoC with HPS
Dynamic Reconfiguration
Enhanced Configuration and Configuration via Protocol
Power Management
Document Revision History for Cyclone® V Device Overview
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Ixiasoft
Embedded Memory Capacity in Cyclone V Devices
Variant | Member Code | M10K | MLAB | Total RAM Bit (Kb) | ||
---|---|---|---|---|---|---|
Block | RAM Bit (Kb) | Block | RAM Bit (Kb) | |||
Cyclone V E | A2 | 176 | 1,760 | 314 | 196 | 1,956 |
A4 | 308 | 3,080 | 485 | 303 | 3,383 | |
A5 | 446 | 4,460 | 679 | 424 | 4,884 | |
A7 | 686 | 6,860 | 1338 | 836 | 7,696 | |
A9 | 1,220 | 12,200 | 2748 | 1,717 | 13,917 | |
Cyclone V GX | C3 | 135 | 1,350 | 291 | 182 | 1,532 |
C4 | 250 | 2,500 | 678 | 424 | 2,924 | |
C5 | 446 | 4,460 | 678 | 424 | 4,884 | |
C7 | 686 | 6,860 | 1338 | 836 | 7,696 | |
C9 | 1,220 | 12,200 | 2748 | 1,717 | 13,917 | |
Cyclone V GT | D5 | 446 | 4,460 | 679 | 424 | 4,884 |
D7 | 686 | 6,860 | 1338 | 836 | 7,696 | |
D9 | 1,220 | 12,200 | 2748 | 1,717 | 13,917 | |
Cyclone V SE | A2 | 140 | 1,400 | 221 | 138 | 1,538 |
A4 | 270 | 2,700 | 370 | 231 | 2,460 | |
A5 | 397 | 3,970 | 768 | 480 | 4,450 | |
A6 | 553 | 5,530 | 994 | 621 | 6,151 | |
Cyclone V SX | C2 | 140 | 1,400 | 221 | 138 | 1,538 |
C4 | 270 | 2,700 | 370 | 231 | 2,460 | |
C5 | 397 | 3,970 | 768 | 480 | 4,450 | |
C6 | 553 | 5,530 | 994 | 621 | 6,151 | |
Cyclone V ST | D5 | 397 | 3,970 | 768 | 480 | 4,450 |
D6 | 553 | 5,530 | 994 | 621 | 6,151 |