AN 954: Hierarchical Partial Reconfiguration Tutorial: for the Intel® Agilex® F-Series FPGA Development Board

ID 683687
Date 8/04/2021
Public

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Step 7: Compiling the Base Revision

  1. To compile the base revision, click Processing > Start Compilation. Alternatively, the following command compiles the base revision:
    quartus_sh --flow compile blinking_led -c blinking_led
  2. Inspect the bitstream files generated to the output_files directory:
    Table 5.  Generated Files
    Name Type Description
    blinking_led.sof Base programming file For programming the FPGA with the static logic, along with the default personas for the parent and child PR regions.
    blinking_led.pr_parent_partition.rbf PR bitstream file for parent PR partition For programming the default persona of the parent PR region.
    blinking_led.pr_parent_partition.pr_partition.rbf PR bitstream file for child PR partition For programming the default persona of the child PR region.
    blinking_led_static.qdb .qdb database file Finalized database file for importing the static region.
    pr_parent_partition_default_final.qdb .qdb database file Finalized database file for importing the default parent PR partition.