AN 954: Hierarchical Partial Reconfiguration Tutorial: for the Intel® Agilex® F-Series FPGA Development Board

ID 683687
Date 8/04/2021
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Reference Design Requirements

This reference design requires the following:

  • Intel® Quartus® Prime Pro Edition software version 21.1 for the design implementation.
  • Intel® Agilex® F-Series FPGA development kit (DK-DEV-AGF014E3ES or DK-DEV-AGF014E2ES) for the FPGA implementation.