Intel® Quartus® Prime Pro Edition User Guide: Platform Designer

ID 683609
Date 12/20/2023
Public

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5.1.9. Burst Adapter

Platform Designer interconnect uses the memory-mapped burst adapter to accommodate the burst capabilities of each interface in the system, including interfaces that do not support burst transfers.

The maximum burst length for each interface is a property of the interface and is independent of other interfaces in the system. Therefore, a specific host may be capable of initiating a burst longer than an agent’s maximum supported burst length. In this case, the burst adapter translates the large host burst into smaller bursts, or into individual agent transfers if the agent does not support bursting. Until the host completes the burst, arbiter logic prevents other hosts from accessing the target agent. For example, if a host initiates a burst of 16 transfers to an agent with maximum burst length of 8, the burst adapter initiates 2 bursts of length 8 to the agent.

Avalon® memory mapped burst transactions allow a host uninterrupted access to an agent for a specified number of transfers. The host specifies the number of transfers when it initiates the burst. Once a burst begins between a host and agent, arbiter logic is locked until the burst completes. For burst hosts, the length of the burst is the number of cycles that the host has access to the agent, and the selected arbitration shares have no effect.

Note: AXI managers can issue burst types that Avalon® cannot accept, for example, fixed bursts. In this case, the burst adapter converts the fixed burst into a sequence of transactions to the same address.
Note: For AMBA* 4 AXI subordinates, Platform Designer allows 256-beat INCR bursts. You must ensure that 256-beat narrow-sized INCR bursts are shortened to 16-beat narrow-sized INCR bursts for AMBA* 3 AXI subordinates.

Avalon® memory mapped hosts always issue addresses that are aligned to the size of the transfer. However, when Platform Designer uses a narrow-to-wide width adaptation, the resulting address may be unaligned. For unaligned addresses, the burst adapter issues the maximum sized bursts with appropriate byte enables. This brings the burst-in-progress up to an aligned agent address. Then, it completes the burst on aligned addresses.

The burst adapter supports variable wrap or sequential burst types to accommodate different properties of memory-mapped hosts. Some bursting hosts can issue more than one burst type.

Burst adaptation is available for Avalon® to Avalon® , Avalon® to AXI, and AXI to Avalon® , and AXI to AXI connections. For information about AXI-to-AXI adaptation, refer to AXI Wide-to-Narrow Adaptation

Note: For AMBA* 4 AXI to AMBA* 3 AXI connections, Platform Designer follows an AMBA* 4 AXI 256 burst length to AMBA* 3 AXI 16 burst length.