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A.1. CFI Flash Memory Map
A.2. Preparing Design Files for Flash Programming
A.3. Creating Flash Files Using the Nios II EDS
A.4. Programming Flash Memory Using the Board Update Portal
A.5. Programming Flash Memory Using the Nios II EDS
A.6. Restoring the Flash Device to the Factory Settings
A.7. Restoring the MAX V CPLD to the Factory Settings
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2. Getting Started
The remaining chapters in this user guide lead you through the following development kit setup steps:
- Inspecting the contents of the kit
- Installing the design and kit software
- Setting up, powering up, and verifying correct operation of the Intel® Arria® 10 GX transceiver signal integrity development board
- Configuring the Intel® Arria® 10 GX FPGA device
- Running the Board Test System designs