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1. Introduction to Intel® FPGA SDK for OpenCL™ Pro Edition Best Practices Guide
2. Reviewing Your Kernel's report.html File
3. OpenCL Kernel Design Concepts
4. OpenCL Kernel Design Best Practices
5. Profiling Your Kernel to Identify Performance Bottlenecks
6. Strategies for Improving Single Work-Item Kernel Performance
7. Strategies for Improving NDRange Kernel Data Processing Efficiency
8. Strategies for Improving Memory Access Efficiency
9. Strategies for Optimizing FPGA Area Usage
10. Strategies for Optimizing Intel® Stratix® 10 OpenCL Designs
11. Strategies for Improving Performance in Your Host Application
12. Intel® FPGA SDK for OpenCL™ Pro Edition Best Practices Guide Archives
A. Document Revision History for the Intel® FPGA SDK for OpenCL™ Pro Edition Best Practices Guide
2.1. High-Level Design Report Layout
2.2. Reviewing the Summary Report
2.3. Viewing Throughput Bottlenecks in the Design
2.4. Using Views
2.5. Analyzing Throughput
2.6. Reviewing Area Information
2.7. Optimizing an OpenCL Design Example Based on Information in the HTML Report
2.8. Accessing HLD FPGA Reports in JSON Format
4.1. Transferring Data Via Intel® FPGA SDK for OpenCL™ Channels or OpenCL Pipes
4.2. Unrolling Loops
4.3. Optimizing Floating-Point Operations
4.4. Allocating Aligned Memory
4.5. Aligning a Struct with or without Padding
4.6. Maintaining Similar Structures for Vector Type Elements
4.7. Avoiding Pointer Aliasing
4.8. Avoid Expensive Functions
4.9. Avoiding Work-Item ID-Dependent Backward Branching
5.1. Best Practices for Profiling Your Kernel
5.2. Instrumenting the Kernel Pipeline with Performance Counters (-profile)
5.3. Obtaining Profiling Data During Runtime
5.4. Reducing Area Resource Use While Profiling
5.5. Temporal Performance Collection
5.6. Performance Data Types
5.7. Interpreting the Profiling Information
5.8. Profiler Analyses of Example OpenCL Design Scenarios
5.9. Intel® FPGA Dynamic Profiler for OpenCL™ Limitations
8.1. General Guidelines on Optimizing Memory Accesses
8.2. Optimize Global Memory Accesses
8.3. Performing Kernel Computations Using Constant, Local or Private Memory
8.4. Improving Kernel Performance by Banking the Local Memory
8.5. Optimizing Accesses to Local Memory by Controlling the Memory Replication Factor
8.6. Minimizing the Memory Dependencies for Loop Pipelining
8.7. Static Memory Coalescing
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11.2.1. Double Buffered Host Application Utilizing Kernel Invocation Queue
Double buffering in OpenCL host application allows OpenCL runtime environment to coalesce memory transfers and kernel execution.
To utilize hardware kernel invocation queue while double buffering, write your host code as shown in the following code snippet:
int main()
{ …
cl_event dependencies[2];
for (int i=0; i<MAX_ITERATIONS; i++) {
if (i < 2) {
clEnqueueWriteBuffer(writeQ, inputBufferD[i%2], CL_FALSE, …, inputBufferH[i], 0, NULL, &writeEvent[i]);
clFlush(writeQ);
clSetKernelArg(kernel, 0, sizeof(cl_mem *), &inputBufferD[i%2]);
clSetKernelArg(kernel, 1, sizeof(cl_mem *), &outputBufferD[i%2]);
clEnqueueNDRangeKernel(kernelQ, kernel, …, 1, &writeEvent[i], &kernelEvent[i]);
clFlush(kernelQ);
} else {
clEnqueueWriteBuffer(writeQ, inputBufferD[i%2], CL_FALSE, …, inputBufferH[i], 1, &kernelEvent[i-2], &writeEvent[i]);
clFlush(writeQ);
dependencies[0] = writeEvent[i];
dependencies[1] = readEvent[i-2];
clSetKernelArg(kernel, 0, sizeof(cl_mem *), &inputBufferD[i%2]);
clSetKernelArg(kernel, 1, sizeof(cl_mem *), &outputBufferD[i%2]);
clEnqueueNDRangeKernel(kernelQ, kernel, …, 2, dependencies, &kernelEvent[i]);
clFlush(kernelQ);
}
clEnqueueReadBuffer(readQ, output_device[i%2], CL_FALSE, …, outputBufferH[i], 1, &kernelEvent[i], &readEvent[i]);
clFlush(readQ);
}
…
}
The following diagram helps you in visualizing the event dependency:
Note: Arrows represent the source of event in the event wait list.
Figure 93. Event Dependency Graph
The following figure illustrates the order the commands are executed on the device assuming kernel execution is longer than reads and writes, and the device supports concurrent reads and writes:
Figure 94. Order of Event Execution