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1. About the Video and Image Processing Suite
2. Avalon Streaming Video
3. Clocked Video
4. VIP Run-Time Control
5. Getting Started
6. VIP Connectivity Interfacing
7. Clocked Video Interface IPs
8. 2D FIR II IP Core
9. Mixer II IP Core
10. Clipper II IP Core
11. Color Plane Sequencer II IP Core
12. Color Space Converter II IP Core
13. Chroma Resampler II IP Core
14. Control Synchronizer IP Core
15. Deinterlacer II IP Core
16. Frame Buffer II IP Core
17. Gamma Corrector II IP Core
18. Configurable Guard Bands IP Core
19. Interlacer II IP Core
20. Scaler II IP Core
21. Switch II IP Core
22. Test Pattern Generator II IP Core
23. Trace System IP Core
24. Warp Lite Intel FPGA IP
25. Avalon-ST Video Stream Cleaner IP Core
26. Avalon-ST Video Monitor IP Core
27. VIP IP Core Software Control
28. Security Considerations
29. Video and Image Processing Suite User Guide Archives
30. Document Revision History for the Video and Image Processing Suite User Guide
A. Avalon-ST Video Verification IP Suite
7.1. Supported Features for Clocked Video Output II IP
7.2. Control Port
7.3. Clocked Video Input IP Format Detection
7.4. Clocked Video Output IP Video Modes
7.5. Clocked Video Output II Latency Mode
7.6. Generator Lock
7.7. Underflow and Overflow
7.8. Timing Constraints
7.9. Handling Ancillary Packets
7.10. Modules for Clocked Video Input II IP Core
7.11. Clocked Video Input II Signals, Parameters, and Registers
7.12. Clocked Video Output II Signals, Parameters, and Registers
15.1. Deinterlacing Algorithm Options
15.2. Deinterlacing Algorithms
15.3. Run-time Control
15.4. Pass-Through Mode for Progressive Frames
15.5. Cadence Detection (Motion Adaptive Deinterlacing Only)
15.6. Avalon-MM Interface to Memory
15.7. Motion Adaptive Mode Bandwidth Requirements
15.8. Avalon-ST Video Support
15.9. 4K Video Passthrough Support
15.10. Behavior When Unexpected Fields are Received
15.11. Handling of Avalon-ST Video Control Packets
15.12. Deinterlacer II Parameter Settings
15.13. Deinterlacing Control Registers
A.3.1. c_av_st_video_control
A.3.2. c_av_st_video_data
A.3.3. c_av_st_video_file_io
A.3.4. c_av_st_video_item
A.3.5. c_av_st_video_source_sink_base
A.3.6. c_av_st_video_sink_bfm_’SINK
A.3.7. c_av_st_video_source_bfm_’SOURCE
A.3.8. c_av_st_video_user_packet
A.3.9. c_pixel
A.3.10. av_mm_transaction
A.3.11. av_mm_master_bfm_`MASTER_NAME
A.3.12. av_mm_slave_bfm_`SLAVE_NAME
A.3.13. av_mm_control_register
A.3.14. av_mm_control_base
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25.2. Repairing Non-Ideal and Error Cases
The Avalon-ST Video Stream Cleaner IP core repairs various non-ideal and error cases.
Non-Ideal/Error Cases | Action |
---|---|
Multiple control packets per frame/field | Uses the values from the final control packet in the sequence to generate a single control packet at the output. |
Broken control packets | Ignores and removes the control packets with too few beats of data to decode correctly from the data stream. |
User packets between the control and frame/field packet |
|
Missing control packet | Removes any frame/field packets without an associated decodable control packet (since the preceding frame) from the stream. |
Frame/field dimensions larger than parameterized maxima | If the height or width specified by the preceding control packet is larger than the maximum value set in the parameter editor, the IP core removes the frame/field packet from the stream. |
Frame/field dimensions smaller than parameterized minima | If the height or width specified by the preceding control packet is smaller than maximum value set in the parameter editor, the IP core removes the frame/field packet from the stream. |
Frame/field packet longer than specified by the control packet | If the frame/field packet contains more beats of data than the beats specified by the height and width values in the preceding control packet, the IP core clips the frame/field packet so its length matches the control packet values. |
Frame/field packet shorter than specified by the control packet | If the frame/field packet contains fewer beats of data than the beats specified by the height and width values in the preceding control packet, the IP core pads the frame/field packet with gray pixel data so its length matches the control packet values. |
Interlaced data above 1080i (optional) | This optional featured (parameter controlled) will remove any fields with preceding control packets that specify interlaced data greater than 1920 pixels wide or 540 lines per field (greater than 1080i). |
Non-modulo line lengths | If you set a modulo check value (set to 1), the Avalon-ST Video Stream Cleaner IP core will check whether the frame/field width for the incoming control packet and the frame/field packets is an integer multiple of this value. If the width is not an integer multiple of the modulo check value, the IP core adjusts the control packet width to the nearest integer multiple. The IP core clips each line in the frame/field packet accordingly. |