Visible to Intel only — GUID: bhc1411020296000
Ixiasoft
Visible to Intel only — GUID: bhc1411020296000
Ixiasoft
17. Gamma Corrector II IP Core
- Configurable look-up table (LUT) that models the nonlinear function to compensate for the non-linearity.
- Generic LUT based approach, and user programmable LUT contents that allows the IP core to implement any transform that maps individual color plane value at the input to new values at the output according to a fixed mapping.
- Supports up to 4 pixels in parallel.
- Supports extra pipelining registers.
The Gamma Corrector II IP core implements one LUT for each color plane in the pixel. The contents of each LUT are independent of the other LUTs, so each color plane may have its own unique transform mapping. You program the contents of each LUT at run time through an Avalon-MM control slave interface. At this time, the IP core does not support any preset values or a fixed operation mode where you may specify the LUT contents at compile time. As a result, the contents of the LUT(s) are initialized to 0 after every reset. You must overwrite the desired values before processing begins.
You can choose up to two data banks for each LUT to allow two separate transforms to be defined at one time for each color plane. A switch in the register map controls which bank is used to transform the data for each frame. The inclusion of the second LUT bank allows for rapid switching between two transforms on a frame-by-frame basis, and one LUT bank to be updated with a new transform while the video is processed by the other bank without any disruption.