AN 739: Altera 1588 System Solution

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ID 683410
Date 1/28/2016
Public
Document Table of Contents
Document Table of Contents x
1. Altera 1588 System Solution
1. Altera 1588 System Solution x
1.1. Altera 1588 System Level Overview 1.2. Precision Time Protocol (PTP) Concept in A 1588 System 1.3. Reference Design Walk-through 1.4. System Architecture 1.5. Altera 1588 System Solution Document Revision History
1.2. Precision Time Protocol (PTP) Concept in A 1588 System x
1.2.1. Understanding the Different PTP Clocks 1.2.2. Precision Time Protocol (PTP) Synchronization Process 1.2.3. Functional Flow For A 1588 Ordinary Clock Master/Slave Mode System 1.2.4. Functional Flow For A 1588 Transparent Clock Master/Slave Mode System 1.2.5. Functional Flow for A 1588 Boundary Clock Mode System 1.2.6. Timestamp Packet Functional Flow in Linux Driver
1.3. Reference Design Walk-through x
1.3.1. System Requirements 1.3.2. Reference Design User Guide
1.3.2. Reference Design User Guide x
1.3.2.1. Hardware Setup 1.3.2.2. Executing The Reference Design 1.3.2.3. Replacing RBF File
1.3.2.1. Hardware Setup x
1.3.2.1.1. Loading the Boot Image into SD Card 1.3.2.1.2. Setting Up Development Kit 1.3.2.1.3. Booting Up The Reference Design
1.4. System Architecture x
1.4.1. System Modules 1.4.2. Clocking and Reset Scheme 1.4.3. System Parameters 1.4.4. System Register Map 1.4.5. Interface Signals
1.4.1. System Modules x
1.4.1.1. MAC 1.4.1.2. Time of Day (ToD) 1.4.1.3. Packet Parser 1.4.1.4. The Central Processing Unit (CPU) 1.4.1.5. FIFO
1.4.4. System Register Map x
1.4.4.1. MAC Registers 1.4.4.2. Transceiver Registers 1.4.4.3. PTP Control Registers 1.4.4.4. 1588 ToD Clock Registers
1.4.5. Interface Signals x
1.4.5.1. Clock and Reset Signals 1.4.5.2. PHY Interface Signals 1.4.5.3. HPS Signals
1. Altera 1588 System Solution

1.2.1. Understanding the Different PTP Clocks

The following figure shows the different PTP clocks in a networked distributed system, where Altera Ethernet MAC with 1588 hardware IP can be used. The follow-up messages shown in the diagram are meant for 2-step mechanism and are not required for 1-step mechanism. The accuracy of hardware IP time stamping for 1-step and 2-step mechanisms remains the same even with the existence of follow-up messages in 2-step mechanism.
Figure 2. Different PTP Clocks Defined in IEEE 1588v2

In addition to the clock nodes shown in the figure, there is also a management node communicating management messages to query and update the PTP datasets maintained by the clock nodes for the purposes of initialization and fault management. This node typically resides in a CPU.

The following describe the different PTP clocks present in the PTP protocol:
  • Ordinary Clock:

    An ordinary clock (OC) device can be either a master clock or a slave clock and it is a single port in a 1588 clock domain network.

  • Transparent Clock:

    A transparent clock (TC) device updates the PTP messages with the time taken by them to traverse through the network device from an ingress Ethernet port to an egress Ethernet port. In other words, the TC device updates the PTP event messages with their residence delay in the devices before the messages are transmitted out. The TC has two modes; end-to-end mode and peer-to-peer mode. The end-to-end TC uses the end-to-end delay measurement mechanism between slave clocks and the master clock. The peer-to-peer TC involves link delay correction using peer-to-peer delay measurement mechanism, in addition to the residence delay correction.

  • Boundary Clock:

    A boundary clock (BC) device has multiple ports in a 1588 clock domain with one slave clock port and possibly more than one master clock port. The BC maintains the same timescale for the slave clock port and possibly multiple master clock ports. A BC helps to avoid the long chain of transparent clocks between the network 1588 grandmaster and slave, leading to higher inaccuracy in the slave’s ToD synchronization. The BC also helps to divide a larger 1588 network, thus reducing the traffic going all the way back to the original 1588 master. Typical application BC devices include routers, gateways and bridges.

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