Mailbox Client Intel® FPGA IP User Guide

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ID 683290
Date 11/10/2021
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Document Table of Contents
Document Table of Contents x
1. Mailbox Client Intel FPGA IP User Guide 2. Appendix: CONFIG_STATUS and RSU_STATUS Error Code Descriptions
1. Mailbox Client Intel FPGA IP User Guide x
1.1. Device Family Support 1.2. Parameters 1.3. Mailbox Client Intel FPGA Core Interface Signals 1.4. Mailbox Client Intel FPGA IP Avalon® MM Memory Map 1.5. Commands and Responses 1.6. Specifying the Command and Response FIFO Depths 1.7. Enabling Cryptographic Services 1.8. Using the Mailbox Client Intel FPGA IP 1.9. Mailbox Client Intel FPGA IP Core Use Case Examples 1.10. Nios® II HAL Driver 1.11. Mailbox Client Intel FPGA IP User Guide Archives 1.12. Document Revision History for the Mailbox Client Intel FPGA IP User Guide
1.3. Mailbox Client Intel FPGA Core Interface Signals x
1.3.1. Clock and Reset Interfaces 1.3.2. Avalon® Memory-Mapped Interface 1.3.3. AXI Target Interface
1.4. Mailbox Client Intel FPGA IP Avalon® MM Memory Map x
1.4.1. Interrupt Enable Register 1.4.2. Interrupt Status Register 1.4.3. Timer Registers
1.5. Commands and Responses x
1.5.1. Operation Commands 1.5.2. Error Code Responses 1.5.3. Error Code Recovery
1.10. Nios® II HAL Driver x
1.10.1. Driver API
1. Mailbox Client Intel FPGA IP User Guide
2. Appendix: CONFIG_STATUS and RSU_STATUS Error Code Descriptions

1.5.3. Error Code Recovery

The table below describes possible steps to recover from an error code. Error recovery depends on specific use case.
Table 13.  Error Code Recovery for known Error Codes
Value Error Code Response Error Code Recovery
4 INVALID_COMMAND_PARAMETERS Resend the command header or header with arguments with corrected parameters.

For example, ensures that the length field setting in header is sent with the correct value.

6 COMMAND_INVALID_ON_SOURCE Resend the command from valid source such as JTAG, HPS, or core fabric.
8 CLIENT_ID_NO_MATCH Wait for the client who opened the access to quad SPI to complete its access and then closes the exclusive access to quad SPI.
9 INVALID_ADDRESS

Possible error recovery steps:

For GET_VOLTAGE command: Send command with a valid bitmask.

For GET_TEMPERATURE command: Send command with valid sensor location and sensor mask.

For QSPI operation:
  • Send command with a valid chip select.
  • Send command with a valid QSPI flash address.

For RSU: Send command with a valid start address of the factory image or application.

B TIMEOUT

Possible recovery steps:

For GET_TEMPERATURE command: Retry to send the command again. If problem persists, reconfigure or power cycle the device.

For QSPI operation: Check signal integrity of QSPI interfaces and attempt command again.

For HPS restart operation: Retry to send the command again.

C HW_NOT_READY

Possible recovery steps:

For QSPI operation: Reconfigure the device via source. Ensure that IP used to build your design allows access to the QSPI flash.

For RSU: Configure the device with RSU image.

80 QSPI_HW_ERROR Check the QSPI interface signal integrity and to ensure the QSPI device is not damaged.
81 QSPI_ALREADY_OPEN Client already opened QSPI. Continue with the next operation.
82 EFUSE_SYSTEM_FAILURE Attempt reconfiguration or power cycle. If error persists after reconfiguration or power cycle, the device may be damaged and unrecoverable.
100 NOT_CONFIGURED Send a bitstream that configures the HPS.
1FF ALT_SDM_MBOX_RESP_DEVICE_ BUSY

Possible error recovery steps:

For QSPI operation: Wait for ongoing configuration or other client to complete operation.

For RSU: Reconfigure device to recover from internal error.

For HPS restart operation: Wait for reconfiguration via HPS or HPS Cold Reset to complete.

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