F-Tile CPRI PHY Intel® FPGA IP User Guide

ID 683284
Date 10/04/2021
Public

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Document Table of Contents

1.1. Supported Features

The F-Tile CPRI PHY Intel® FPGA IP core supports the following features:
  • Compliant with the CPRI Specification V7.0 (2015-10-09).
  • Supports line bit rates of;
    • 1.228 Gbps
    • 2.4576 Gbps
    • 3.072 Gbps
    • 4.9152 Gbps
    • 6.144 Gbps
    • 9.8304 Gbps
    • 10.1376 Gbps with and without RS-FEC
    • 12.1651 Gbps with and without RS-FEC
    • 24.33024 Gbps with and without RS-FEC
  • Supports deterministic latency measurement.
  • Provides register access interface to external or on-chip processor, using the Intel® Avalon® Memory-Mapped ( Avalon® -MM) interconnect specification.
  • Supports Physical Medium Attachment (PMA) adaptation.
Table 1.  F-Tile CPRI PHY Intel® FPGA IP Core Feature Matrix
CPRI Line Bit Rate (Gbps) RS-FEC Support Reference Clock (MHz) Deterministic Latency Support
1.2288 No 153.6 Yes
2.4576 No 153.6 Yes
3.072 No 153.6 Yes
4.9152 No 153.6 Yes
6.144 No 153.6 Yes
9.8304 No 153.6 Yes
10.1376 With and Without 184.32 Yes
12.1651 With and Without 184.32 Yes
24.33024 With and Without 184.32 Yes