Nios II Classic Software Developer’s Handbook

ID 683282
Date 5/14/2015
Public

Visible to Intel only — GUID: mwh1416946914673

Ixiasoft

Document Table of Contents

8.3.2.6.2. Hardware Interrupt Priorities with an External Interrupt Controller

With an EIC, the hardware interrupt priority level can be more flexible than with the IIC. The method of assigning priority levels to IRQs depends on the specific EIC implementation.

For example, with the Intel FPGA VIC, you can adjust hardware interrupt priority levels at runtime, with the alt_vic_irq_set_level() function.

For more information about the VIC, refer to the "Vectored Interrupt Controller Core" chapter in the Embedded Peripherals IP User Guide.