Visible to Intel only — GUID: mwh1416946918105
Ixiasoft
Visible to Intel only — GUID: mwh1416946918105
Ixiasoft
8.5.2.1. Hardware Interrupt Dispatch with the Internal Interrupt Controller
The general exception funnel looks at the estatus register to determine the interrupt enable status. If the PIE bit is set, hardware interrupts were enabled at the time the exception happened. If so, the general exception funnel transfers control to the hardware interrupt funnel. The hardware interrupt funnel looks at the IRQ bits in ipending. If any IRQs are asserted, the interrupt funnel calls the appropriate hardware interrupt handler.
If hardware interrupts are not enabled at the time of the exception, it is not necessary to look at ipending.
If no IRQs are active, there is no hardware interrupt, and the exception is a software exception. In this case, the general exception funnel calls the software exception funnel.
All hardware interrupts are higher priority than software exceptions.
For more information about the Nios II processor estatus and ipending registers, refer to the "Programming Model" chapter of the Nios II Processor Reference Handbook.