DisplayPort Intel® FPGA IP User Guide

ID 683273
Date 4/18/2023
Public

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Document Table of Contents

10.3.13. DPTX_TEST_264BIT_PATTERN8

Address: 0x001C

Direction: RW

Reset: 0x00000000

Table 93.  DPTX_TEST_264BIT_PATTERN8 Bits

Bit

Bit Name

Function

31:0

264BIT_PATTERN8

Bits 255:224 of the 264 bit custom pattern for PHY compliance test.