DisplayPort Intel® FPGA IP User Guide

ID 683273
Date 4/18/2023
Public

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Document Table of Contents

10.8.3. DPTX_AUX_BYTE0

AUX Transaction Byte 0 Register.

Address: 0x0102

Direction: RW

Reset: 0x00000000

Table 114.  DPTX_AUX_BYTE0 Bits

Bit

Bit Name

Function

31:8

Unused

7:0

BYTE

Transaction address [15:8] for the next request, or data(0) received in the last reply