Triple-Speed Ethernet Intel® FPGA IP Release Notes

ID 683215
Date 7/08/2024
Public
Document Table of Contents

1.1. Triple-Speed Ethernet Intel® FPGA IP (intel_eth_tse) v5.0.0

Table 1.  v5.0.0 2024.07.08
Quartus® Prime Version Description Impact
24.2
  • Added support for Agilex™ 5 D-Series FPGAs and SoCs.1
  • Added the following support for Agilex™ 5 devices:
    • Added hardware support for the 10/100/1000 ethernet MAC design example with 1000BASE-X/SGMII 2XTBI PCS with GTS transceiver.
    • Added support for analog parameter.
    • Removed VCS* simulator support.
1 Device support for Agilex™ 5 D-Series FPGAs and SoCs in the Quartus® Prime Pro Edition software version 24.2 is restricted. To enable D-Series device support in your instance of the Quartus® Prime Pro Edition software, contact your regional Altera sales representative.