Nios® II Flash Programmer User Guide

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ID 683118
Date 11/06/2017
Public
Document Table of Contents
Document Table of Contents x
1. Overview of the Nios® II Flash Programmer 2. Using the Flash Programmer GUI 3. Using the Flash Programmer from the Command Line A. Non-Standard Flash Memories B. Troubleshooting C. Document Revision History
1. Overview of the Nios® II Flash Programmer x
1.1. Prerequisites 1.2. Nios® II Flash Programmer GUI and Command-Line Utilities 1.3. How the Flash Programmer Works 1.4. Document Revision History for Overview of the Nios® II Flash Programmer
1.3. How the Flash Programmer Works x
1.3.1. Flash Programmer Target Design
2. Using the Flash Programmer GUI x
2.1. Starting the Flash Programmer GUI 2.2. Specifying your Flash Programmer Settings 2.3. Working with Flash Programmer Settings Files 2.4. Setting the Hardware Connection 2.5. Checking System ID and System Timestamp 2.6. Generating Flash Files and Programming Flash Memory 2.7. Document Revision History for Using the Flash Programmer GUI
3. Using the Flash Programmer from the Command Line x
3.1. quartus_pgm --nios2 3.2. sof2flash 3.3. elf2flash 3.4. bin2flash 3.5. Document Revision History for Using the Flash Programmer from the Command Line
3.1. quartus_pgm --nios2 x
3.1.1. quartus_pgm --nios2 Parameters 3.1.2. quartus_pgm --nios2 Command-Line Examples
3.1.1. quartus_pgm --nios2 Parameters x
3.1.1.1. General Parameters 3.1.1.2. Device Parameters
3.2. sof2flash x
3.2.1. sof2flash Parameters 3.2.2. sof2flash Command-Line Examples
3.2.1. sof2flash Parameters x
3.2.1.1. General Parameters 3.2.1.2. Device Parameters 3.2.1.3. Configuration-Specific Parameters
3.3. elf2flash x
3.3.1. elf2flash Parameters 3.3.2. Programming Both Hardware and Software into an EPCS/EPCQ Device 3.3.3. elf2flash Command-Line Examples
3.3.1. elf2flash Parameters x
3.3.1.1. General Parameters 3.3.1.2. CFI Parameters 3.3.1.3. EPCS Parameters
3.4. bin2flash x
3.4.1. bin2flash Parameters 3.4.2. bin2flash Command-Line Example
A. Non-Standard Flash Memories x
A.1. Built-in Recognition and Override A.2. Flash Override Files A.3. Width Mode Override Parameter A.4. Document Revision History for Non-Standard Flash Memories
A.2. Flash Override Files x
A.2.1. Flash Override File Format A.2.2. How to Use the Flash Override File
B. Troubleshooting x
B.1. Overview B.2. Start Button Grayed Out in the Flash Programmer GUI B.3. 'No Nios® II Processors Available' Error B.4. 'No CFI Table Found' Error B.5. 'No EPCS Registers Found' Error B.6. 'System Does Not Have Any Flash Memory' Error B.7. 'Reading System ID at Address 0x<address>: FAIL' Error B.8. 'Base Address Not Aligned on Size of Device' Error B.9. Document Revision History for Troubleshooting
B.2. Start Button Grayed Out in the Flash Programmer GUI x
B.2.1. Probable Cause B.2.2. Suggested Actions
B.3. 'No Nios® II Processors Available' Error x
B.3.1. Probable Cause B.3.2. Suggested Actions
B.4. 'No CFI Table Found' Error x
B.4.1. Probable Cause B.4.2. Suggested Actions
B.5. 'No EPCS Registers Found' Error x
B.5.1. Probable Cause B.5.2. Suggested Actions
B.6. 'System Does Not Have Any Flash Memory' Error x
B.6.1. Probable Cause B.6.2. Suggested Actions
B.7. 'Reading System ID at Address 0x<address>: FAIL' Error x
B.7.1. Probable Cause B.7.2. Suggested Actions
B.8. 'Base Address Not Aligned on Size of Device' Error x
B.8.1. Probable Cause B.8.2. Suggested Actions
1. Overview of the Nios® II Flash Programmer
2. Using the Flash Programmer GUI
3. Using the Flash Programmer from the Command Line
A. Non-Standard Flash Memories
B. Troubleshooting
C. Document Revision History

2.4. Setting the Hardware Connection

This section describes how to select the correct download cable, device, and processor to program flash memory. If your system has only a single download cable and a single processor, the process is simple. This section describes all the steps for a system with multiple download cables, processors, and devices.

Before you can program flash memory on your board, you must configure your FPGA with a flash programmer target design that contains at least the minimum component set specified in the "Minimum Component Set for the Flash Programmer Target Design" table in the "Flash Programmer Target Design" chapter.

Note: For instructions to configure the FPGA, refer to the " Intel® Quartus® Prime Programmer" chapter in volume 3 of the Intel® Quartus® Prime Handbook.

After you load the target design on your FPGA, you can set the hardware connection for programming flash memory.

To set the Hardware Connection, perform the following steps:

  1. Click Hardware Connections. The Hardware Connections dialog box appears.
  2. In the Hardware Connections dialog box, click Refresh Connections.
  3. If you are reusing an .flash-settings file, and the Intel® Quartus® Prime project has been recompiled since the .flash-settings file was created or the Name column entries in the Processors list are blank, perform the following steps:
    1. Under JTAG Debugging Information File name, browse to locate your project JTAG Debugging Information File (.jdi).
    2. Click Resolve Names. The flash programmer uses the .jdi file to ensure the available connection information is accurate.
  4. If your design has multiple download cables, select the appropriate cable.
  5. If your design has multiple processors, select the Nios® II processor that corresponds to the CPU to program flash value under Target hardware information in the Nios® II Flash Programmer dialog box.
  6. Click Close.
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