Visible to Intel only — GUID: sfo1410068293834
Ixiasoft
Visible to Intel only — GUID: sfo1410068293834
Ixiasoft
10.3.2. Implementation Details
Feature |
Options |
---|---|
Cortex®-A9 processors |
2 |
Instruction cache size per Cortex®-A9 processor |
32 KB |
Data cache size per Cortex®-A9 processor |
32 KB |
TLB size per Cortex®-A9 processor |
128 entries |
Media Processing Engine with NEON* technology per Cortex®-A9 processor21 |
Included |
Preload Engine per Cortex®-A9 processor |
Included |
Number of entries in the Preload Engine FIFO per Cortex®-A9 processor |
16 |
Jazelle DBX extension per Cortex®-A9 processor |
Full |
Program Trace Macrocell (PTM) interface per Cortex‑A9 processor |
Included |
Support for parity error detection22 |
Included |
Master ports |
Two |
Accelerator Coherency Port |
Included |