Visible to Intel only — GUID: sfo1410068278411
Ixiasoft
Visible to Intel only — GUID: sfo1410068278411
Ixiasoft
27.1.5. AXI Bridges
Parameter Name |
Parameter Description |
Interface Name |
---|---|---|
FPGA-to-HPS interface width |
Enable or disable the FPGA-to-HPS interface; if enabled, set the data width to 32, 64, or 128 bits. |
f2h_axi_slave f2h_axi_clock |
HPS-to-FPGA interface width |
Enable or disable the HPS-to-FPGA interface; if enabled, set the data width to 32, 64, or 128 bits. |
h2f_axi_master h2f_axi_clock |
Lightweight HPS-to-FPGA interface width |
Enable or disable the lightweight HPS-to-FPGA interface. When enabled, the data width is 32 bits. |
h2f_lw_axi_master h2f_lw_axi_clock |