Visible to Intel only — GUID: sfo1410067672668
Ixiasoft
Visible to Intel only — GUID: sfo1410067672668
Ixiasoft
3.3.2. Hardware-Managed and Software-Managed Clocks
When changing values on clocks, the terms hardware-managed and software-managed define who is responsible for successful transitions. Software-managed clocks require that software manually gate any clock affected by the change, wait for any PLL lock if required, then ungate the clocks. Hardware-managed clocks use hardware to ensure that a glitch-free transition to a new clock value occurs. There are three hardware-managed sets of clocks in the HPS, namely, clocks generated from the main PLL outputs C0, C1, and C2. All other clocks in the HPS are software-managed clocks.