FPGA SmartVID

Design guidance for SmartVID capable FPGAs Voltage Regulator selection.

Overview

SmartVID is a feature on select Altera® FPGAs where the device identifies the optimal voltage that it should be operated at, and provides this information to the power regulator via the PMBus. The term represents Smart Voltage IDentification (SmartVID).

The SmartVID feature compensates for process variation by narrowing the process distribution using voltage adaptation. The feature allows a voltage regulator to provide the SmartVID device with VCC and VCCP voltage levels that optimize its performance by dynamic voltage adjustment. It is managed by the Secure Device Manager (SDM) subsystem.

Several Altera® FPGA Families support the SmartVID which is indicated by a suffix in the ordering part number (OPN), these include:

Agilex™ 7 F-Series and I-Series devices with suffix: -V, -E, and -X
Agilex™ 7 M-Series devices with suffix: -V, and -E
Stratix® 10 devices with suffix: -V

Table 1. SmartVID device support for PMBus

Important:

The PMBus operating mode is application dependent and must be determined prior to board design to ensure all required signals are supported.
Incorrect implementation may prevent the configuration of the device.

Each SmartVID device supports PMBus Controller and Target Modes with 1.8-V single-ended I/O standard.

PMBus Interface Signal	PMBus Controller¹ Operating Mode	PMBus Target² Operating Mode
PWRMGT_SCL	Required	Required
PWRMGT_SDA	Required	Required
PWRMGT_ALERT	-	Required
1. Controller formerly master 2. Target formerly slave

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Recommended Voltage Regulators

Table 2. Recommended PMBus-Compliant Voltage Regulator

Important:

A PMBus Compliant Voltage Regulator must be used to supply power to SmartVID devices.
If the voltage regulator is not properly selected and implemented, the device configuration will fail, and likely result in a costly board spin.

A PMBus Compliant Voltage Regulator must be used to supply power to SmartVID devices.

FPGA Device Family	Fully Validated¹	API ValidatedOnly²
Agilex™ 7	ISL682XX ISL69260 LTC3888 LTM4677 PXE1410CDM_G005 XDPE12284C XDPE15284D	MPM3698 MP2975 MAX20796 MAX20734 MAX20743 MAX20855 XDPE1A2G5B LTM4678 LTM4680 LTM4681 TPS53676
Agilex™ 5	TPS53676 LTC3882-1 ISL68223
Stratix® 10	LTM4677
Column Term Definitions: Fully Validated: These regulators are regression tested and validated for every release of Quartus Prime Pro software. Intel strongly recommends using one of these regulators. API Validated: These devices are known to be API compatible with the SDM power management firmware but have not been physically tested.

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SmartVID Debug Checklist and Voltage Regulator Guidelines

Review AN 974: Agilex™ 7 and Stratix® 10 SmartVID Debug Checklist and Voltage Regulator Guidelines documentation before designing the board, this user guide provides the requirements for Intel SmartVID devices and helps designers choose a voltage regulator compatible with power management firmware run by FPGA Secure Device Manager (SDM).

Table 3. Voltage Regulator Coefficients

Important:

To prevent configuration failure make sure the Coefficient value for Voltage Regulator is correct when populate the setting in Quartus® Prime Pro Edition Software.
Incorrect coefficients value may cause the Voltage Regulator to provide incorrect voltage value to the FPGA and may cause configuration failure.

Voltage Regulator	Vout_Format	Coefficients	Unit
LTM4677	Linear	N=-12	Volt
LTM4681	Linear⁵	N = -12	Volt
LTC3888	Linear⁶	N=-12	Volt
LTC3882-1	Linear	N=-12	Volt
TPS53676	Linear	N=-10	Volt
ISL682xx/1xx	Direct	m=1, b=0, r=3	Volt
ISL682xx/1xx	Direct	m=1, b=0, r=0	millivolt
ISL69260	Direct	m=1, b=0, r=3	Volt
ISL69260	Direct	m=1, b=0, r=0	millivolt
MAX20796/ MAX20734/43	Linear	N=-9	Volt
MAX20855	VID_Table²	m = 1, b = -490, r = -1	millivolt
MP2975	VID_Table²	m=2, b=-490, r=-1	millivolt
MPM3698	VID_Table²	m=200, b=-49, r=0	Volt
XDPE 15284D	Linear¹	N=-9	Volt
XDPE 12284C	IMVP9^2,3	m=1, b=-200, r=-1	millivolt
PXE1410CDM_G005	VID_Table^2,4 (VR12.0 5mV step)	m=2, b=-490, r=-1	millivolt
PXE1410CDM_G005	VID_Table^2,4 (VR12.5 10mV step)	m=1, b=-490, r=-1	millivolt
The default Mode and Exponent associated with the XDPE15284D are configured to support Linear Mode and Exponent of -9. Set the vout_format to Direct in the Power Management setting when use VR with this vout format. The default Mode and Coefficients associated with XDPE12284C are configured to support IMVP9. The default Mode and Coefficients associated with PXE1410CDM_G005 are configured to support VR12.0. Set the slave device type as LTM4677 in Quartus to use this VR This VR is having a slow readback response time

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Documentation

User Guide Topic	User Guide	Description
Power Management User Guides	Agilex™ 7 Power Management User Guide Stratix® 10 Power Management User Guide	These user guides provide information related to SmartVID feature implementations. Review the user guides to understand on the PMBus communication between FPGA and voltage regulator.
Power Distribution Network User Guides	Device-Specific Power Delivery Network (PDN) Tool 2.0 User Guide AN 910: Agilex™ 7 Power Distribution Network Design Guidelines AN 974: Stratix® 10 and Agilex™ SmartVID Debug Checklist and Voltage Regulator Guidelines	These user guides provide information for Power Distribution Network (PDN) that allow you to successfully complete your PDN design, without requiring additional support.