Intel® Power Solutions Resources
Intel power solutions resources will help guide you through power consumption considerations when planning system designs, estimating power requirements throughout the entire design flow, and meeting demanding power requirements using Intel® Enpirion® Power Solution DC-DC converters. These converters feature integrated inductors to deliver an industry-leading combination of high efficiency, small footprint, and low-noise performance.
Get support resources for Intel Agilex® 7, Intel® Stratix® 10, Intel® Arria® 10, and Intel® Cyclone® 10 devices from the pages below. For other devices, search from the following links Documentation Archive, Training Courses, Videos, Design Examples, and Knowledge Base.
Getting Started
Power system design is done in several logical phases:
Choosing a Power Tree
In this phase, a power tree topology is chosen based on the requirements of the device. The requirements of the power supply may not yet be known, but the supply voltage and connection requirements of various devices are available in the Power Management Handbooks, Pin Connection Guidelines, and Power Tree selector guides in the Intel Enpirion Power Resource Center. Any required power supply sequencing and SmartVID usage will impact the power tree topology.
Power Estimation
In this phase, the amount of electrical power required by the various device power supplies is estimated using the Early Power Estimator (EPE) tool or Intel® FPGA Power and Thermal Calculator (PTC) and the Intel® Quartus® Prime Power Analyzer tool. As the design evolves to the final configuration, the quality and type of information available improve and the estimation becomes more accurate.
The current version of the Intel® FPGA PTC supports Intel Agilex and Intel Stratix 10 devices. This tool does not support older devices such as the Intel Arria 10 and Intel Cyclone 10 families; use the corresponding Early Power Estimator if you are working with those devices.
Power Optimization
In this phase, the device configuration can be optimized for minimum power. This step can involve the Intel® Quartus® software power optimization wizard, the SmartVID feature (in some devices), system cooling decisions, and/or dynamic workload management strategies. This phase may occur several times during the evolution of the system and device design.
Power Generation
In this phase, voltage regulator modules (VRMs) are selected based on the power tree and electrical power estimations. VRM selection is critical to producing high-quality power systems with the minimum number and cost of bypass elements. Intel Enpirion VRMs are featured due to their high quality and fast load transient response.
Power Distribution
In this phase, the power distribution network (PDN) is designed, producing a list of the required number, value, and quality of bypass capacitors using the PDN tool, power tree, VRMs, electrical power estimations, and board physical geometries.
Power Dissipation and Thermal Considerations
In this phase, thermal power estimations are used to select device cooling solutions. The EPE or PTC assists with the cooling of system designs. The effects of junction temperature on device power generation and device reliability should be considered in this phase.
1. Power Architecture – The Power Tree
Designing the Power Tree
Device |
Download Estimator |
User Guide |
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Intel Stratix 10 |
Early Power Estimator for Intel® Stratix® 10 FPGAs User Guide |
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Intel Arria 10 |
PowerPlay Early Power Estimator Download Intel® Arria® 10 Devices |
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Intel Cyclone 10 GX |
Early Power Estimator for Intel® Cyclone® 10 GX FPGAs User Guide |
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Intel Cyclone 10 LP |
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Intel MAX 10 |
Calculator
Training and videos
- Power Analysis Training
- Power Supply, Ripple & Load Transient Terms and Correct Way to Measure Ripple
- Exporting Power Parameters from Quartus® and Importing Them into the EPE Tool
- How to generate VCD file for power analyzer
User Guide
Power Optimization
Application Notes
- AN 711: Power Reduction Features in Intel Arria 10 Devices
- AN 531: Reducing Power with Hardware Accelerators
Video
FAQ
Additional Resources
Intel Agilex Devices
- Intel Agilex® 7 Power Management User Guide
- Intel Agilex® 7 Device Family Pin Connection Guidelines
- Intel Agilex® 7 Device Data Sheet
Intel Stratix 10 Devices
- Intel® Stratix® 10 Power Management User Guide
- Intel® Stratix® 10 Device Family Pin Connection Guidelines
- Intel® Stratix® 10 Device Datasheet
Intel Arria 10 Devices
- Intel® Arria® 10 Core Fabric and General Purpose I/Os Handbook
- Intel® Arria® 10 GX, GT, and SX Device Family Pin Connection Guidelines
- Intel® Arria® 10 Device Datasheet
Intel Cyclone 10 LP Devices
3. Generation and Distribution
Generation
- Intel® Enpirion® Power Solutions Legacy Device Support
- Meeting FPGA Power Requirements with Intel Enpirion® Power Solutions (Video 3 min.)
- AN 583: Designing Power Isolation Filters with Ferrite Beads for Intel® FPGAs
- AN 692: Power Sequencing Considerations for Intel® Cyclone® 10 GX, Intel® Arria® 10, Intel® Stratix® 10, and Intel Agilex® 7 Devices
- AN 742: PMBus SmartVID Controller Reference Designs
Distribution
- AN 574: Printed Circuit Board (PCB) Power Delivery Network (PDN) Design Methodology
- AN 750: Using the Altera PDN Tool to Optimize Your Power Delivery Network Design
- Device-Specific Power Delivery Network (PDN) Tool 2.0 User Guide
- Power Distribution Network
Additional Resources
4. Power Dissipation and Thermal Management
General
Intel Stratix 10 Devices
5. User Guides, Checklists, Design Examples, and Reference Designs
User Guides
General
Intel Agilex Devices
Intel Stratix 10 Devices
- Intel® Stratix® 10 Power Management User Guide
- Early Power Estimator for Intel® Stratix® 10 FPGAs User Guide
Intel Arria 10 Devices
Intel Cyclone 10 GX Devices
Intel Cyclone 10 LP Devices
Intel MAX 10 Devices
Checklists
- SmartVID Debug Checklist for Intel® FPGAs
- Early Power Estimator (EPE) and Intel® Power and Thermal Calculator (PTC) Debug Checklist
Design Examples and Reference Designs
6. Training Courses and Videos
Intel® FPGA Technical Training
Topic |
Description |
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This is part one of a two-part training course. This training course will give you the knowledge and tools you need to perform highly accurate power usage estimations using the Intel Quartus Prime software. In this first part, you’ll learn how to perform an early power estimation before you've even started creating a design. You'll also learn how to set up and use the Power Analyzer to generate detailed reports on both static and dynamic power usage at any stage of the FPGA design flow. |
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This is part two of a two-part training course. This training will give you the knowledge and tools you need to perform highly accurate power usage estimations using the Intel Quartus Prime software. In this second part, now that you know how to perform a power analysis, you’ll see how to use this information to optimize a design to minimize power through power-driven compilation options and following low-power design guidelines. |
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Thermal management is an important aspect of implementing today's high-speed devices. The more power put into a device, the more heat that must be removed. Most FPGA devices consist of a single monolithic silicon die, making the process of designing a cooling solution focused on that single die. Intel Stratix 10 FPGA devices, however, consist of a core die and multiple transceiver dies, each of which affect the overall thermal profile of the entire device. In this training, you'll learn about the thermal factors involved with a multi-die device and how the new Intel Stratix 10 Early Power Estimator (EPE) makes it easy to calculate these factors based on your design and transceiver channel use. Use these calculated factors to make decisions about your FPGA design and cooling solution. |
Intel® FPGA Quick Videos
Topic |
Description |
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Power Supply, Ripple & Load Transient Terms and Correct Way to Measure Ripple |
This short video explains the Intel® FPGA power supply deviation nomenclature and how to stay within the static and dynamic power accuracy budget. |
Exporting Power Parameters from Quartus® and Importing Them into the EPE Tool |
This short video introduces the Early Power Estimator (EPE) tool and how to easily export your design from the Intel Quartus software. |
There are several possible phases in modeling an FPGA power usage. This short video shows how to export the most complete and accurate power model from the Intel Quartus software into the EPE tool. |
7. Debug
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