Reset_Mgr Summary

Registers in the Reset Manager module

Base Address: 0xFFD11000

Register

Address Offset

 Bit Fields
i_rst_mgr_rstmgr

stat

0x0

32-bit

 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

csdaprst

RW 0x0

debugrst

RW 0x0

Reserved

l4wd3rst

RW 0x0

l4wd2rst

RW 0x0

l4wd1rst

RW 0x0

l4wd0rst

RW 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

mpu3rst

RW 0x0

mpu2rst

RW 0x0

mpu1rst

RW 0x0

mpu0rst

RW 0x0

Reserved

sdmlastporrst

RW 0x1

sdmwarmrst

RW 0x0

sdmcoldrst

RW 0x0

miscstat

0x8

32-bit

 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

l3nocdbgtimeout

RW 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

mpul2flushtimeout

RW 0x0

Reserved

etrstalltimeout

RW 0x0

fpgahstimeout

RW 0x0

Reserved

sdrselfreftimeout

RW 0x0

hdsken

0x10

32-bit

 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

debug_l3noc

RW 0x0

l3noc_dbg

RW 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

l2flushen

RW 0x0

Reserved

etrstallen

RW 0x0

fpgahsen

RW 0x0

Reserved

sdrselfrefen

RW 0x0

hdskreq

0x14

32-bit

 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

debug_l3noc_req

RW 0x0

l3noc_dbg_req

RW 0x0

etrstallreq

RW 0x0

fpgahsreq

RW 0x0

Reserved

sdrselfrefreq

RW 0x0

hdskack

0x18

32-bit

 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

debug_l3noc_ack

RW 0x0

l3noc_dbg_ack

RW 0x0

etrstallack

RW 0x0

fpgahsack

RW 0x0

Reserved

sdrselfreqack

RW 0x0

hdskstall

0x1C

32-bit

 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

etrstallwarmrst

RW 0x0

mpumodrst

0x20

32-bit

 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

core3

RW 0x0

core2

RW 0x0

core1

RW 0x0

core0

RW 0x0

per0modrst

0x24

32-bit

 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

dmaif7

RW 0x1

dmaif6

RW 0x1

dmaif5

RW 0x1

dmaif4

RW 0x1

dmaif3

RW 0x1

dmaif2

RW 0x1

dmaif1

RW 0x1

dmaif0

RW 0x1

Reserved

emacptp

RW 0x1

dmaocp

RW 0x1

spis1

RW 0x1

spis0

RW 0x1

spim1

RW 0x1

spim0

RW 0x1

dma

RW 0x1

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

sdmmcocp

RW 0x1

Reserved

nandocp

RW 0x1

usb1ocp

RW 0x1

usb0ocp

RW 0x1

emac2ocp

RW 0x1

emac1ocp

RW 0x1

emac0ocp

RW 0x1

sdmmc

RW 0x1

Reserved

nand

RW 0x1

usb1

RW 0x1

usb0

RW 0x1

emac2

RW 0x1

emac1

RW 0x1

emac0

RW 0x1

per1modrst

0x28

32-bit

 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

gpio1

RW 0x1

gpio0

RW 0x1

Reserved

uart1

RW 0x1

uart0

RW 0x1

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

i2c4

RW 0x1

i2c3

RW 0x1

i2c2

RW 0x1

i2c1

RW 0x1

i2c0

RW 0x1

sptimer1

RW 0x1

sptimer0

RW 0x1

l4systimer1

RW 0x1

l4systimer0

RW 0x1

watchdog3

RW 0x1

watchdog2

RW 0x1

watchdog1

RW 0x1

watchdog0

RW 0x1

brgmodrst

0x2C

32-bit

 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

ddrsch

RW 0x1

f2ssdram2

RW 0x1

f2ssdram1

RW 0x1

f2ssdram0

RW 0x1

fpga2soc

RW 0x1

lwhps2fpga

RW 0x1

soc2fpga

RW 0x1

coldmodrst

0x34

32-bit

 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

l2

RW 0x0

Reserved

cpupor3

RW 0x0

cpupor2

RW 0x0

cpupor1

RW 0x0

cpupor0

RW 0x0

dbgmodrst

0x3C

32-bit

 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

csdap_rst

RW 0x0

dbg_rst

RW 0x0

tapmodrst

0x40

32-bit

 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

tap

RW 0x0

brgwarmmask

0x4C

32-bit

 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

ddrsch

RW 0x1

f2ssdram2

RW 0x1

f2ssdram1

RW 0x1

f2ssdram0

RW 0x1

fpga2soc

RW 0x1

lwhps2fpga

RW 0x1

soc2fpga

RW 0x1

tststa

0x5C

32-bit

 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

rstst

RO 0x0

hdsktimeout

0x64

32-bit

 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

val

RW 0x2800

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

val

RW 0x2800

mpul2flushtimeout

0x68

32-bit

 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

val

RW 0x100000

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

val

RW 0x100000

ocramload

0x80

32-bit

 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

done

RW 0x0

mpurststat

0x4

32-bit

 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

core3_irq

RW 0x0

core2_irq

RW 0x0

core1_irq

RW 0x0

core0_irq

RW 0x0

Reserved

cpupor3_irq

RW 0x0

cpupor2_irq

RW 0x0

cpupor1_irq

RW 0x0

cpupor0_irq

RW 0x0

dbghdsktimeout

0x6C

32-bit

 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

val

RW 0x100000

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

val

RW 0x100000