mpurststat 

         The "mpurststat" register contains bits which indicate SDM that  a CPU and/or Core reset has been asserted by MPU Software which is triggered by writing to the "mpumodrst" register and cpupor* fields of "coldmodrst" register. 
Hardware writes 1 to the respective bits to indicate which cpu or core has been reset. Software clears bits by writing 1.
All the fields are cleared by cold reset.
Module Instance Base Address Register Address
i_rst_mgr_rstmgr 0xFFD11000 0xFFD11004

Size: 32

Offset: 0x4

Access: RW

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

core3_irq

RW 0x0

core2_irq

RW 0x0

core1_irq

RW 0x0

core0_irq

RW 0x0

Reserved

cpupor3_irq

RW 0x0

cpupor2_irq

RW 0x0

cpupor1_irq

RW 0x0

cpupor0_irq

RW 0x0

mpurststat Fields

Bit Name Description Access Reset
11 core3_irq 
This bit indicates SDM that MPU software has asserted reset to core3 by writing to "mpumodrst" register.
RW 0x0
10 core2_irq 
This bit indicates SDM that MPU software has asserted reset to core2 by writing to "mpumodrst" register.
RW 0x0
9 core1_irq 
This bit indicates SDM that MPU software has asserted reset to core1 by writing to "mpumodrst" register.
RW 0x0
8 core0_irq 
This bit indicates SDM that MPU software has asserted reset to core0 by writing to "mpumodrst" register.
RW 0x0
3 cpupor3_irq 
This bit indicates SDM that MPU software has asserted reset to CPU3 by writing to the 'cpupor3' bit of register "coldmodrst".
RW 0x0
2 cpupor2_irq 
This bit indicates SDM that MPU software has asserted reset to CPU2 by writing to the 'cpupor2' bit of register "coldmodrst".
RW 0x0
1 cpupor1_irq 
This bit indicates SDM that MPU software has asserted reset to CPU1 by writing to the 'cpupor1' bit of register "coldmodrst".
RW 0x0
0 cpupor0_irq 
This bit indicates SDM that MPU software has asserted reset to CPU0 by writing to the 'cpupor0' bit of register "coldmodrst".
RW 0x0