GTS Interlaken Intel® FPGA IP User Guide

ID 819200
Date 7/08/2024
Public

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2.6. Compiling the Full Design and Programming the FPGA

Use the Start Compilation command on the Processing menu in the Quartus® Prime software to compile your design. After successfully compiling your design, program the targeted Intel® device with the Programmer and verify the design in hardware. Quartus® Prime may give a critical warning if the HSSI parameters in the Quartus® Prime settings file (.qsf) to configure the FGT PMAs is not specified.