Hard Processor System Component Reference Manual: Agilex™ 5 SoCs

ID 813752
Date 8/09/2024
Public
Document Table of Contents

2.6.1.1. Auto-Place IP

The Auto-Place IP tab contains a list of HPS peripherals that can be enabled and either routed to the HPS I/O or to the FPGA.

Auto-Place IP feature assists you to easily select the desired peripherals and have the tool automatically place those peripherals either among the 48 dedicated HPS I/O or on the FPGA if available.
Figure 24.  Platform Designer: Pin Mux and Peripherals: Auto-Place IP GUI

You can enable one or more instances of each peripheral type by using the dropdown menu next to each peripheral. When enabled, some peripherals also have mode settings specific to their functions. Once you have selected a peripheral, you must click the Apply Selections button to enable the selected peripherals. Clicking the Apply Selections button triggers the HPS component to do a best-effort automatic placement of the enabled peripheral signals to the HPS I/O. This overrides any settings already chosen in the Advanced tab. The results of this placement become visible in the I/O Selections section on the right side of the Auto-Place IP tab. Any messages, such as failures to place a peripheral, appear in the message box in the I/O Selections section.

You can enable the following types of peripherals:
  • SD/MMC Controller
  • USB 2.0 OTG Controller (USB0)
  • USB 3.1 Gen1 Controller (USB1)
  • Ethernet Media Access Controller
  • SPI Master
  • SPI Slave
  • UART Controller
  • I2C Controller
  • I3C Controller
  • NAND Flash Controller
  • CoreSight Debug and Trace
  • GPIO

For more information about each of these HPS peripherals, refer to the Hard Processor System Technical Reference Manual: Agilex™ 5 SoCs.