1G/2.5G/5G/10G Multirate Ethernet PHY Intel® FPGA IP User Guide: Agilex™ 5 FPGAs and SoCs

ID 813667
Date 7/08/2024
Public
Document Table of Contents

1.5. Resource Utilization

The following estimates are obtained by compiling the 1G/2.5G/5G/10G Multirate Ethernet PHY Intel® FPGA IP for Agilex™ 5 devices using the Quartus® Prime Pro Edition software.
Table 6.  Resource Utilization
Speed ALM ALUT Logic Register Memory Block (M20K)
10M/100M/1G/2.5G (with 8-bit/16-bit adapter for HPS) 2725 2780 3746 4
10M/100M/1G/2.5G 1204 1785 1805 2
1G/2.5G 1442 1785 1812 2
10M/100M/1G/2.5G/5G/10G (USXGMII) 1298 1797 2119 4