2. Device Security Features Overview
Altera® designs FPGAs that provide advanced security features in order to help you meet your requirements for implementing a secured system. This section provides a high-level overview and description of these security features. Not all security features are available on all devices.
The table below provides a high-level summary of available security features on SDM-based devices. For more details on feature implementation, see the Security Methodology for Intel FPGAs and Structured ASICs User Guide.
| Category | Device | Stratix® 10 | eASIC™ N5X | Agilex™ 7 | Agilex™ 7 | Agilex™ 5 | Agilex™ 5 | Agilex™ 3 | Agilex™ 3 |
|---|---|---|---|---|---|---|---|---|---|
| Density | All | 006, 008, 012, 014, 022, 027 | 019, 023 | All (B, D, E) | All (A, C, G) | All (W, Y) | All (Z) | ||
| Feature | |||||||||
| Authentication | Bitstream Authentication | Yes | Yes | Yes | Yes | Yes | Yes | Yes | Yes |
| Vendor Authorized Boot | No | Yes | Yes | Yes | Yes | Yes | Yes | Yes | |
| Encryption | Bitstream Encryption - AES-256-CTR | Yes | Yes | Yes | Yes | Yes | Yes | Yes | Yes |
| Encryption Key Storage: eFuse | Yes | Yes | Yes | Yes | Yes | Yes | Yes | Yes | |
| Encryption Key Storage: BBRAM | Yes | No | Yes | Yes | Yes | Yes | No | No | |
| Encryption Key Storage: PUF Wrapped (Flash) | Yes | No | Yes | Yes | Yes | Yes | Yes | No | |
| Black Key Provisioning | Yes | Yes | Yes | Yes | Yes | Yes | Yes | No | |
| Attestation | Yes | Yes | Yes | Yes | Yes | Yes | Yes | No | |
| Advanced Features | Physical Anti-Tamper | Yes | Yes | Yes | Yes | Yes | Yes | Yes | Yes |
| Secure Data Object Storage | No | Yes | Yes | Yes | Yes | Yes | Yes | No | |
| Cryptographic Primitive Services | No | No | Yes (B) | Yes (D) | Yes | No | Yes | No |