Security Overview for SDM-Based FPGA Devices

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ID 794424
Date 9/20/2024
Public
Document Table of Contents
Document Table of Contents x
1. FPGA Device Security Overview 2. Device Security Features Overview 3. Device Security Resources 4. Revision History for the Security Overview for SDM-based FPGA Devices
2. Device Security Features Overview x
2.1. Hardware Root of Trust 2.2. Authentication 2.3. Attributes 2.4. Configuration Bitstream Encryption 2.5. Platform Attestation 2.6. Cryptographic Services 2.7. Physical Anti-Tamper Monitoring 2.8. Secure Debug
1. FPGA Device Security Overview
2. Device Security Features Overview
3. Device Security Resources
4. Revision History for the Security Overview for SDM-based FPGA Devices

2.2. Authentication

The SDM verifies that a bitstream or command originates from the device owner and has not been changed since creation when the authentication feature is enabled. The SDM performs this verification using digital signatures applied to the bitstream or command. The SDM uses a key programmed into fuses to validate the applied digital signatures. The key identifies the device owner, and its presence in fuses enables the authentication feature. Once authentication is enabled, it may not be disabled. Authentication is the base security feature for Altera® devices with an SDM. No other security features may be enabled without first enabling authentication.

Level Two Title